Operational amplifiers are implemented in a variety of topologies including so-called indirect or Ahuja frequency compensation topologies, which employ current buffers. The most widely known introduction of operational amplifier with indirect frequency compensation of the output stage using a current buffer was derived by B. K. Ahuja. See, for example, B. K. Ahuja, “An Improved Frequency Compensation Technique for CMOS Operational Amplifiers,” IEEE J. Solid-State Circuits, vol. SC-18, No. 6, pp. 629-633, December 1983, which is incorporated herein by reference. Thus, operation amplifiers of this type are often referred to as Ahuja or Ahuja-type amplifiers, components, frequency compensation, etc.
The Ahuja frequency compensation scheme is a well-known frequency compensation for operational amplifiers. The Ahuja frequency compensation was developed to improve upon the well-known Miller compensation, in which a capacitor is connected between the drain and the gate of the output transistor operating in common source amplifier mode. The Ahuja frequency compensation implements an indirect coupling of this capacitor by providing a current buffer which delivers the capacitor feedback signal to the gate of the output transistor of the amplifier.
FIG. 1(a) illustrates a schematic diagram of a prior art operational amplifier circuit 10 with a Miller compensation circuit. The circuit 10 shown in FIG. 1(a) includes a folded cascade input differential stage and an output stage. The input stage is generally composed of input transistors 20 and 24, active load transistors 18 and 22, and folded cascode transistors 12 and 28. Transistor 26 provides the input stage with the tail current. A cascoded current mirror composed of transistors 14, 16, 30, and 32 can perform the differential-to-single-ended signal conversion. The amplifier output stage is composed of cascoded MOS transistors 42 and 40 employed in common source amplification mode and an active load transistor 36. A frequency compensation capacitor 34 is connected between the amplifier output node 38 and the gate of the MOS transistor 42. Transistors 16, 26, 32, and 42 are connected to ground, while transistors 18, 22, and 36 are connected to the voltage VDD.
FIG. 1(b) illustrates a schematic diagram of a prior art operational amplifier circuit 50 with an Ahuja-type compensation circuit. Note that in FIGS. 1(a)-1(b), similar parts or elements are generally identified by identical reference numerals. The circuit 50 of FIG. 1(b) is identical in structure to circuit 10 shown in FIG. 1(a) with only one difference, which is the connection of the frequency compensation capacitor 34. One node of the frequency compensation capacitor 34 remains connected to the amplifier output node 78, while the other node of the frequency compensation capacitor 34 is connected to the source of the folded cascode transistor 28. For the feedback signal provided by the frequency compensation capacitor 34, the transistor 28 is acting in a common gate amplification mode. Since transistor 28 is used as a path both for the amplified input signal and the feedback signal, the schematic of FIG. 1(b) deviates from the spirit of the original Ahuja circuit in which the feedback signal was delivered through a separate current buffer. This difference is not critical for the current invention.
FIG. 1(c) illustrates a Bode plot 90 of a prior art operational amplifier with Miller compensation. FIG. 1(d) illustrates a Bode plot 92 of a prior art operational amplifier with Ahuja-type compensation. FIG. 1(e) illustrates a plot 94 of the transient response of a prior art operational amplifier with Miller compensation. FIG. 1(f) illustrates a plot 96 of the transient response of a prior art operational amplifier with Ahuja-type compensation. FIG. 2 illustrates a Bode plot 100 of a prior art Ahuja-type internal compensation loop;
There are many advantages to the use of Ahuja frequency compensation applications circuits. FIGS. 1(a), 1(b), 1(c), 1(d), 1(e), 1(f) and FIG. 2 demonstrate some of these advantages while also indicating problems. The main advantage is a very significant increase in capacitive load driving capability.
One of the problems associated with Ahuja-type frequency compensation circuits is the use of the more complex internal feedback loop, which causes a ringing at the amplifier output. This significantly limits the use of an otherwise very effective compensation technique.
FIGS. 1(c) and 1(d) depict simulated Bode plots for these two schematics. The plot 90 of FIG. 1(c), which corresponds to the traditional Miller compensation of FIG. 1(a), demonstrates a lack of a phase margin at the unity gain frequency while the plot 92 of FIG. 1(d), which corresponds to Ahuja-type compensation circuit configuration of FIG. 1(b) demonstrates a phase margin greater than 80° at a unity gain frequency. The respective plots 94 and 96 of FIGS. 1(e) and 1(f) show a simulated transient response of the same schematics for the case when disturbances are applied through switched capacitors to the output nodes of the amplifiers connected in a 100% feedback configuration. As expected, the plot 94 of FIG. 1(e) corresponding to the Miller compensation with insufficient phase margin indicates quite significant ringing, but the Ahuja compensation with abundance of the phase margin on the frequency response demonstrates even more ringing at a much higher frequency (plot 96 of FIG. 1(f)).
This ringing is caused by the fact that Ahuja compensation, contrary to that of Miller compensation, has a frequency compensation internal feedback loop, which is not inherently stable. Such a loop is composed of two amplifying transistors: PMOS transistor MB (i.e., transistor 28 in FIG. 1(b)) connected in common gate configuration, and NMOS transistor MO (i.e., transistor 42 of FIG. 1(b)) connected in a common source configuration.
FIG. 2 illustrates a simulated Bode plot 100 of the Ahuja-type internal frequency compensation loop of the operational amplifier shown in FIG. 1(b). The lack of the phase margin (just 8 degrees) at the unity gain frequency is apparent. The phase margin deficiency of the frequency compensation loop is responsible for complex poles in the amplifier's transfer function and results in the ringing of the output signal.
In the frequency range where 1/RL>>ωCL>>ωCm (where RL is the effective active load of the output stage, ω is radian frequency, CL is the load capacitance and Cm is the frequency compensation capacitance), the loop has a phase margin dose to 180°, but in the high frequency range where ωCL>>ωCm≧Gm(Mb) (where Gm(Mb) is the transconductance of the folded cascode transistor acting as a current buffer) two poles become dominant in the frequency response of the loop significantly deteriorating the phase margin.
In order to take full advantage of Ahuja compensation, the unity gain of this feedback loop has to be in this high frequency range. So far, it has never been an attempt to change the loop topology in order to mitigate its effect on the operational amplifier transient response but all efforts were directed upon optimization of its component parameters even in the most recent studies of the Ahuja compensation technique. As it is clearly seen in FIG. 1(f), however, this problem can significantly degrade the performance of the operational amplifier especially driving a switched capacitor load.